Computer memory



A20 - a pain from the past win tue
        A20 - a pain from the past

''Computers in Spaceflight: The NASA Experience'' – By James Tomayko (Chapter 2, Part 5, "The Apollo guidance computer: Hardware")
        Ch2-5

The Arcade Flyer Archive – Konami Bubble System Flyer
        The Arcade Flyer Archive - Bubble System, Konami

Great Microprocessors of the Past and Present. Appendix F: Memory Types – Web site by John Bayko
        The Great CPU List, Appendix F

Intel Corp - Intel, a maker of several notable CPU lines, including IA-32, IA-64, and XScale. Also a producer of various peripheral chips for use with their CPUs.
        Intel

CAM Primer toronto cam
        Kostas Pagiamtzis :: Introduction to Content-Addressable Memory (CAM)

Photos of core rope memory and its production – By Raytheon; hosted by the Dibner Institute for the History of Science and Technology
        
Are you ready for http://www.froola.com? froola

Memory Hierarchy in Cache-Based Systems , by Ruud van der Pas, 2002, Sun Microsystems, is a nice introductory article to CPU memory caching.
        

Cache Performance for SPEC CPU2000 Benchmarks — Hill and Cantin — 2003 — This reference paper has been updated several times. It has thorough and lucidly presented simulation results for a reasonably wide set of benchmarks and cache organizations.
        Cache performance of SPEC CPU2000

Official JEDEC website
        JEDEC

Overview of QBM articles memory display
        X-bit labs - Articles - Quad Band Memory Technology from Kentron: Shorter Way to Higher Memory Bandwidth?

Overview of Rambus XDR labs
        GamePC - Restarting The Memory War : Rambus XDR DRAM Tech Preview

Overview of DDR-II technology memory
        LostCircuits, Memory Reviews

Delay line memories science uva museum
        Delay line memories

Acoustic Delay Line Memory www stanford pub museum pictures display
        Early Devices display

Univac I mercury delay line memory permission for this picture given by autor, Ed Thelen -->
        

How to Install PC Memory Guides support
        How to Install PC Memory

DMA and Interrupt Handling
        Direct Memory Access (DMA) and Interrupt Handling

Memory Mapping and DMA , from Linux Device Drivers, 3rd Edition, Jonathan Corbet, Alessandro Rubini, Greg Kroah-Hartman
        

mmap() and DMA , from Linux Device Drivers, 2nd Edition, Alessandro Rubini & Jonathan Corbet
        Linux Device Drivers, 2nd Edition: Chapter 13: mmap and DMA

Librascope RPC-4000 – Another drum memory computer referenced in the above story
        BRL Report 1964

Librascope LGP-30 – The drum memory computer referenced in the above story, also referenced on Librascope LGP-30.
        BRL Report 1964

The Story of Mel – the classic story about one programmer's drum machine hand-coding antics
        

Challenges and future directions for the scaling of dynamic random-access memory (DRAM) - J. A. Mandelman, R. H. Dennard, G. B. Bronner, J. K. DeBrosse, R. Divakaruni, Y. Li, and C. J. Radens, IBM 2002
        Challenges and future directions for the scaling of dynamic random-access memory (DRAM)

Scaling and Technology Issues for Soft Error Rates - A Johnston - 4th Annual Research Conference on Reliability Stanford University, October 2000
        

Soft errors' impact on system reliability - Ritesh Mastipuram and Edwin C Wee, Cypress Semiconductor, 2004
        Soft errors' impact on system reliability - 9/30/2004 - EDN

Tezzaron Semiconductor Soft Error White Paper 1994 litterature review of memory error rate measurements.
        

Benefits of Chipkill-Correct ECC for PC Server Main Memory - A 1997 discussion of SDRAM reliability - some interesting information on "soft errors" from cosmic rays, especially with respect to Error-correcting code schemes
        

Back to Basics - Memory, part 3 archives
        Back to Basics - Memory, part 3

Basic DRAM operation has some interesting historical trend charts of cell size and DRAM density -- but they only go to 1995. Anyone have more recent data?
        Samsung DRAM Lecture

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This article is licensed under the GNU Free Documentation License.
It uses material from the Wikipedia articles : A20 handler , Apollo Guidance Computer , Bubble memory , Central processing unit , Content-addressable memory , Core rope memory , CPU cache , DDR2 SDRAM , DDR SDRAM , Delay line memory , DIMM , Direct memory access , Drum memory , Dynamic random access memory , .
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